
binary-part:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400570 <_init>:
  400570:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400574:	910003fd 	mov	x29, sp
  400578:	94000040 	bl	400678 <call_weak_fn>
  40057c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400580:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400590 <.plt>:
  400590:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400594:	b0000090 	adrp	x16, 411000 <__FRAME_END__+0x100e0>
  400598:	f947fe11 	ldr	x17, [x16, #4088]
  40059c:	913fe210 	add	x16, x16, #0xff8
  4005a0:	d61f0220 	br	x17
  4005a4:	d503201f 	nop
  4005a8:	d503201f 	nop
  4005ac:	d503201f 	nop

00000000004005b0 <malloc@plt>:
  4005b0:	d0000090 	adrp	x16, 412000 <malloc@GLIBC_2.17>
  4005b4:	f9400211 	ldr	x17, [x16]
  4005b8:	91000210 	add	x16, x16, #0x0
  4005bc:	d61f0220 	br	x17

00000000004005c0 <__libc_start_main@plt>:
  4005c0:	d0000090 	adrp	x16, 412000 <malloc@GLIBC_2.17>
  4005c4:	f9400611 	ldr	x17, [x16, #8]
  4005c8:	91002210 	add	x16, x16, #0x8
  4005cc:	d61f0220 	br	x17

00000000004005d0 <__gmon_start__@plt>:
  4005d0:	d0000090 	adrp	x16, 412000 <malloc@GLIBC_2.17>
  4005d4:	f9400a11 	ldr	x17, [x16, #16]
  4005d8:	91004210 	add	x16, x16, #0x10
  4005dc:	d61f0220 	br	x17

00000000004005e0 <abort@plt>:
  4005e0:	d0000090 	adrp	x16, 412000 <malloc@GLIBC_2.17>
  4005e4:	f9400e11 	ldr	x17, [x16, #24]
  4005e8:	91006210 	add	x16, x16, #0x18
  4005ec:	d61f0220 	br	x17

00000000004005f0 <puts@plt>:
  4005f0:	d0000090 	adrp	x16, 412000 <malloc@GLIBC_2.17>
  4005f4:	f9401211 	ldr	x17, [x16, #32]
  4005f8:	91008210 	add	x16, x16, #0x20
  4005fc:	d61f0220 	br	x17

0000000000400600 <free@plt>:
  400600:	d0000090 	adrp	x16, 412000 <malloc@GLIBC_2.17>
  400604:	f9401611 	ldr	x17, [x16, #40]
  400608:	9100a210 	add	x16, x16, #0x28
  40060c:	d61f0220 	br	x17

0000000000400610 <printf@plt>:
  400610:	d0000090 	adrp	x16, 412000 <malloc@GLIBC_2.17>
  400614:	f9401a11 	ldr	x17, [x16, #48]
  400618:	9100c210 	add	x16, x16, #0x30
  40061c:	d61f0220 	br	x17

0000000000400620 <putchar@plt>:
  400620:	d0000090 	adrp	x16, 412000 <malloc@GLIBC_2.17>
  400624:	f9401e11 	ldr	x17, [x16, #56]
  400628:	9100e210 	add	x16, x16, #0x38
  40062c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400630 <_start>:
  400630:	d280001d 	mov	x29, #0x0                   	// #0
  400634:	d280001e 	mov	x30, #0x0                   	// #0
  400638:	aa0003e5 	mov	x5, x0
  40063c:	f94003e1 	ldr	x1, [sp]
  400640:	910023e2 	add	x2, sp, #0x8
  400644:	910003e6 	mov	x6, sp
  400648:	580000c0 	ldr	x0, 400660 <_start+0x30>
  40064c:	580000e3 	ldr	x3, 400668 <_start+0x38>
  400650:	58000104 	ldr	x4, 400670 <_start+0x40>
  400654:	97ffffdb 	bl	4005c0 <__libc_start_main@plt>
  400658:	97ffffe2 	bl	4005e0 <abort@plt>
  40065c:	00000000 	.inst	0x00000000 ; undefined
  400660:	00400d0c 	.word	0x00400d0c
  400664:	00000000 	.word	0x00000000
  400668:	00400e28 	.word	0x00400e28
  40066c:	00000000 	.word	0x00000000
  400670:	00400ea8 	.word	0x00400ea8
  400674:	00000000 	.word	0x00000000

0000000000400678 <call_weak_fn>:
  400678:	b0000080 	adrp	x0, 411000 <__FRAME_END__+0x100e0>
  40067c:	f947f000 	ldr	x0, [x0, #4064]
  400680:	b4000040 	cbz	x0, 400688 <call_weak_fn+0x10>
  400684:	17ffffd3 	b	4005d0 <__gmon_start__@plt>
  400688:	d65f03c0 	ret
  40068c:	00000000 	.inst	0x00000000 ; undefined

0000000000400690 <deregister_tm_clones>:
  400690:	d0000080 	adrp	x0, 412000 <malloc@GLIBC_2.17>
  400694:	91014000 	add	x0, x0, #0x50
  400698:	d0000081 	adrp	x1, 412000 <malloc@GLIBC_2.17>
  40069c:	91014021 	add	x1, x1, #0x50
  4006a0:	eb00003f 	cmp	x1, x0
  4006a4:	540000a0 	b.eq	4006b8 <deregister_tm_clones+0x28>  // b.none
  4006a8:	90000001 	adrp	x1, 400000 <_init-0x570>
  4006ac:	f9476421 	ldr	x1, [x1, #3784]
  4006b0:	b4000041 	cbz	x1, 4006b8 <deregister_tm_clones+0x28>
  4006b4:	d61f0020 	br	x1
  4006b8:	d65f03c0 	ret
  4006bc:	d503201f 	nop

00000000004006c0 <register_tm_clones>:
  4006c0:	d0000080 	adrp	x0, 412000 <malloc@GLIBC_2.17>
  4006c4:	91014000 	add	x0, x0, #0x50
  4006c8:	d0000081 	adrp	x1, 412000 <malloc@GLIBC_2.17>
  4006cc:	91014021 	add	x1, x1, #0x50
  4006d0:	cb000021 	sub	x1, x1, x0
  4006d4:	9343fc21 	asr	x1, x1, #3
  4006d8:	8b41fc21 	add	x1, x1, x1, lsr #63
  4006dc:	9341fc21 	asr	x1, x1, #1
  4006e0:	b40000a1 	cbz	x1, 4006f4 <register_tm_clones+0x34>
  4006e4:	90000002 	adrp	x2, 400000 <_init-0x570>
  4006e8:	f9476842 	ldr	x2, [x2, #3792]
  4006ec:	b4000042 	cbz	x2, 4006f4 <register_tm_clones+0x34>
  4006f0:	d61f0040 	br	x2
  4006f4:	d65f03c0 	ret

00000000004006f8 <__do_global_dtors_aux>:
  4006f8:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4006fc:	910003fd 	mov	x29, sp
  400700:	f9000bf3 	str	x19, [sp, #16]
  400704:	d0000093 	adrp	x19, 412000 <malloc@GLIBC_2.17>
  400708:	39414260 	ldrb	w0, [x19, #80]
  40070c:	35000080 	cbnz	w0, 40071c <__do_global_dtors_aux+0x24>
  400710:	97ffffe0 	bl	400690 <deregister_tm_clones>
  400714:	52800020 	mov	w0, #0x1                   	// #1
  400718:	39014260 	strb	w0, [x19, #80]
  40071c:	f9400bf3 	ldr	x19, [sp, #16]
  400720:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400724:	d65f03c0 	ret

0000000000400728 <frame_dummy>:
  400728:	17ffffe6 	b	4006c0 <register_tm_clones>

000000000040072c <insert>:
  40072c:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400730:	910003fd 	mov	x29, sp
  400734:	f9000fa0 	str	x0, [x29, #24]
  400738:	b90017a1 	str	w1, [x29, #20]
  40073c:	d2800300 	mov	x0, #0x18                  	// #24
  400740:	97ffff9c 	bl	4005b0 <malloc@plt>
  400744:	f90017a0 	str	x0, [x29, #40]
  400748:	f94017a0 	ldr	x0, [x29, #40]
  40074c:	b94017a1 	ldr	w1, [x29, #20]
  400750:	b9000001 	str	w1, [x0]
  400754:	f94017a0 	ldr	x0, [x29, #40]
  400758:	f900041f 	str	xzr, [x0, #8]
  40075c:	f94017a0 	ldr	x0, [x29, #40]
  400760:	f900081f 	str	xzr, [x0, #16]
  400764:	f9400fa0 	ldr	x0, [x29, #24]
  400768:	f100001f 	cmp	x0, #0x0
  40076c:	54000081 	b.ne	40077c <insert+0x50>  // b.any
  400770:	f94017a0 	ldr	x0, [x29, #40]
  400774:	f9000fa0 	str	x0, [x29, #24]
  400778:	14000015 	b	4007cc <insert+0xa0>
  40077c:	f9400fa0 	ldr	x0, [x29, #24]
  400780:	b9400000 	ldr	w0, [x0]
  400784:	b94017a1 	ldr	w1, [x29, #20]
  400788:	6b00003f 	cmp	w1, w0
  40078c:	5400012a 	b.ge	4007b0 <insert+0x84>  // b.tcont
  400790:	f9400fa0 	ldr	x0, [x29, #24]
  400794:	f9400400 	ldr	x0, [x0, #8]
  400798:	b94017a1 	ldr	w1, [x29, #20]
  40079c:	97ffffe4 	bl	40072c <insert>
  4007a0:	aa0003e1 	mov	x1, x0
  4007a4:	f9400fa0 	ldr	x0, [x29, #24]
  4007a8:	f9000401 	str	x1, [x0, #8]
  4007ac:	14000008 	b	4007cc <insert+0xa0>
  4007b0:	f9400fa0 	ldr	x0, [x29, #24]
  4007b4:	f9400800 	ldr	x0, [x0, #16]
  4007b8:	b94017a1 	ldr	w1, [x29, #20]
  4007bc:	97ffffdc 	bl	40072c <insert>
  4007c0:	aa0003e1 	mov	x1, x0
  4007c4:	f9400fa0 	ldr	x0, [x29, #24]
  4007c8:	f9000801 	str	x1, [x0, #16]
  4007cc:	f9400fa0 	ldr	x0, [x29, #24]
  4007d0:	a8c37bfd 	ldp	x29, x30, [sp], #48
  4007d4:	d65f03c0 	ret

00000000004007d8 <insert_bst>:
  4007d8:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  4007dc:	910003fd 	mov	x29, sp
  4007e0:	f9000fa0 	str	x0, [x29, #24]
  4007e4:	b90017a1 	str	w1, [x29, #20]
  4007e8:	d2800300 	mov	x0, #0x18                  	// #24
  4007ec:	97ffff71 	bl	4005b0 <malloc@plt>
  4007f0:	f90017a0 	str	x0, [x29, #40]
  4007f4:	f94017a0 	ldr	x0, [x29, #40]
  4007f8:	b94017a1 	ldr	w1, [x29, #20]
  4007fc:	b9000001 	str	w1, [x0]
  400800:	f94017a0 	ldr	x0, [x29, #40]
  400804:	f900041f 	str	xzr, [x0, #8]
  400808:	f94017a0 	ldr	x0, [x29, #40]
  40080c:	f900081f 	str	xzr, [x0, #16]
  400810:	f9400fa0 	ldr	x0, [x29, #24]
  400814:	f100001f 	cmp	x0, #0x0
  400818:	54000441 	b.ne	4008a0 <insert_bst+0xc8>  // b.any
  40081c:	d0000080 	adrp	x0, 412000 <malloc@GLIBC_2.17>
  400820:	91016000 	add	x0, x0, #0x58
  400824:	f94017a1 	ldr	x1, [x29, #40]
  400828:	f9000001 	str	x1, [x0]
  40082c:	14000027 	b	4008c8 <insert_bst+0xf0>
  400830:	f9400fa0 	ldr	x0, [x29, #24]
  400834:	b9400000 	ldr	w0, [x0]
  400838:	b94017a1 	ldr	w1, [x29, #20]
  40083c:	6b00003f 	cmp	w1, w0
  400840:	540001aa 	b.ge	400874 <insert_bst+0x9c>  // b.tcont
  400844:	f9400fa0 	ldr	x0, [x29, #24]
  400848:	f9400400 	ldr	x0, [x0, #8]
  40084c:	f100001f 	cmp	x0, #0x0
  400850:	540000a0 	b.eq	400864 <insert_bst+0x8c>  // b.none
  400854:	f9400fa0 	ldr	x0, [x29, #24]
  400858:	f9400400 	ldr	x0, [x0, #8]
  40085c:	f9000fa0 	str	x0, [x29, #24]
  400860:	14000010 	b	4008a0 <insert_bst+0xc8>
  400864:	f9400fa0 	ldr	x0, [x29, #24]
  400868:	f94017a1 	ldr	x1, [x29, #40]
  40086c:	f9000401 	str	x1, [x0, #8]
  400870:	1400000c 	b	4008a0 <insert_bst+0xc8>
  400874:	f9400fa0 	ldr	x0, [x29, #24]
  400878:	f9400800 	ldr	x0, [x0, #16]
  40087c:	f100001f 	cmp	x0, #0x0
  400880:	540000a0 	b.eq	400894 <insert_bst+0xbc>  // b.none
  400884:	f9400fa0 	ldr	x0, [x29, #24]
  400888:	f9400800 	ldr	x0, [x0, #16]
  40088c:	f9000fa0 	str	x0, [x29, #24]
  400890:	14000004 	b	4008a0 <insert_bst+0xc8>
  400894:	f9400fa0 	ldr	x0, [x29, #24]
  400898:	f94017a1 	ldr	x1, [x29, #40]
  40089c:	f9000801 	str	x1, [x0, #16]
  4008a0:	f9400fa0 	ldr	x0, [x29, #24]
  4008a4:	f9400400 	ldr	x0, [x0, #8]
  4008a8:	f94017a1 	ldr	x1, [x29, #40]
  4008ac:	eb00003f 	cmp	x1, x0
  4008b0:	540000c0 	b.eq	4008c8 <insert_bst+0xf0>  // b.none
  4008b4:	f9400fa0 	ldr	x0, [x29, #24]
  4008b8:	f9400800 	ldr	x0, [x0, #16]
  4008bc:	f94017a1 	ldr	x1, [x29, #40]
  4008c0:	eb00003f 	cmp	x1, x0
  4008c4:	54fffb61 	b.ne	400830 <insert_bst+0x58>  // b.any
  4008c8:	a8c37bfd 	ldp	x29, x30, [sp], #48
  4008cc:	d65f03c0 	ret

00000000004008d0 <search_bst>:
  4008d0:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  4008d4:	910003fd 	mov	x29, sp
  4008d8:	f9000fa0 	str	x0, [x29, #24]
  4008dc:	b90017a1 	str	w1, [x29, #20]
  4008e0:	3900bfbf 	strb	wzr, [x29, #47]
  4008e4:	14000015 	b	400938 <search_bst+0x68>
  4008e8:	f9400fa0 	ldr	x0, [x29, #24]
  4008ec:	b9400000 	ldr	w0, [x0]
  4008f0:	b94017a1 	ldr	w1, [x29, #20]
  4008f4:	6b00003f 	cmp	w1, w0
  4008f8:	54000081 	b.ne	400908 <search_bst+0x38>  // b.any
  4008fc:	52800020 	mov	w0, #0x1                   	// #1
  400900:	3900bfa0 	strb	w0, [x29, #47]
  400904:	1400000d 	b	400938 <search_bst+0x68>
  400908:	f9400fa0 	ldr	x0, [x29, #24]
  40090c:	b9400000 	ldr	w0, [x0]
  400910:	b94017a1 	ldr	w1, [x29, #20]
  400914:	6b00003f 	cmp	w1, w0
  400918:	540000aa 	b.ge	40092c <search_bst+0x5c>  // b.tcont
  40091c:	f9400fa0 	ldr	x0, [x29, #24]
  400920:	f9400400 	ldr	x0, [x0, #8]
  400924:	f9000fa0 	str	x0, [x29, #24]
  400928:	14000004 	b	400938 <search_bst+0x68>
  40092c:	f9400fa0 	ldr	x0, [x29, #24]
  400930:	f9400800 	ldr	x0, [x0, #16]
  400934:	f9000fa0 	str	x0, [x29, #24]
  400938:	f9400fa0 	ldr	x0, [x29, #24]
  40093c:	f100001f 	cmp	x0, #0x0
  400940:	54000080 	b.eq	400950 <search_bst+0x80>  // b.none
  400944:	3940bfa0 	ldrb	w0, [x29, #47]
  400948:	7100001f 	cmp	w0, #0x0
  40094c:	54fffce0 	b.eq	4008e8 <search_bst+0x18>  // b.none
  400950:	f9400fa0 	ldr	x0, [x29, #24]
  400954:	f100001f 	cmp	x0, #0x0
  400958:	540000c1 	b.ne	400970 <search_bst+0xa0>  // b.any
  40095c:	90000000 	adrp	x0, 400000 <_init-0x570>
  400960:	913b6000 	add	x0, x0, #0xed8
  400964:	b94017a1 	ldr	w1, [x29, #20]
  400968:	97ffff2a 	bl	400610 <printf@plt>
  40096c:	14000004 	b	40097c <search_bst+0xac>
  400970:	90000000 	adrp	x0, 400000 <_init-0x570>
  400974:	913ba000 	add	x0, x0, #0xee8
  400978:	97ffff1e 	bl	4005f0 <puts@plt>
  40097c:	f9400fa0 	ldr	x0, [x29, #24]
  400980:	a8c37bfd 	ldp	x29, x30, [sp], #48
  400984:	d65f03c0 	ret

0000000000400988 <delete_bst>:
  400988:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  40098c:	910003fd 	mov	x29, sp
  400990:	f9000fa0 	str	x0, [x29, #24]
  400994:	b90017a1 	str	w1, [x29, #20]
  400998:	3900ffbf 	strb	wzr, [x29, #63]
  40099c:	d0000080 	adrp	x0, 412000 <malloc@GLIBC_2.17>
  4009a0:	91016000 	add	x0, x0, #0x58
  4009a4:	f9400000 	ldr	x0, [x0]
  4009a8:	f9000fa0 	str	x0, [x29, #24]
  4009ac:	14000019 	b	400a10 <delete_bst+0x88>
  4009b0:	f9400fa0 	ldr	x0, [x29, #24]
  4009b4:	b9400000 	ldr	w0, [x0]
  4009b8:	b94017a1 	ldr	w1, [x29, #20]
  4009bc:	6b00003f 	cmp	w1, w0
  4009c0:	54000081 	b.ne	4009d0 <delete_bst+0x48>  // b.any
  4009c4:	52800020 	mov	w0, #0x1                   	// #1
  4009c8:	3900ffa0 	strb	w0, [x29, #63]
  4009cc:	14000011 	b	400a10 <delete_bst+0x88>
  4009d0:	f9400fa0 	ldr	x0, [x29, #24]
  4009d4:	b9400000 	ldr	w0, [x0]
  4009d8:	b94017a1 	ldr	w1, [x29, #20]
  4009dc:	6b00003f 	cmp	w1, w0
  4009e0:	540000ea 	b.ge	4009fc <delete_bst+0x74>  // b.tcont
  4009e4:	f9400fa0 	ldr	x0, [x29, #24]
  4009e8:	f9001ba0 	str	x0, [x29, #48]
  4009ec:	f9400fa0 	ldr	x0, [x29, #24]
  4009f0:	f9400400 	ldr	x0, [x0, #8]
  4009f4:	f9000fa0 	str	x0, [x29, #24]
  4009f8:	14000006 	b	400a10 <delete_bst+0x88>
  4009fc:	f9400fa0 	ldr	x0, [x29, #24]
  400a00:	f9001ba0 	str	x0, [x29, #48]
  400a04:	f9400fa0 	ldr	x0, [x29, #24]
  400a08:	f9400800 	ldr	x0, [x0, #16]
  400a0c:	f9000fa0 	str	x0, [x29, #24]
  400a10:	f9400fa0 	ldr	x0, [x29, #24]
  400a14:	f100001f 	cmp	x0, #0x0
  400a18:	54000080 	b.eq	400a28 <delete_bst+0xa0>  // b.none
  400a1c:	3940ffa0 	ldrb	w0, [x29, #63]
  400a20:	7100001f 	cmp	w0, #0x0
  400a24:	54fffc60 	b.eq	4009b0 <delete_bst+0x28>  // b.none
  400a28:	f9400fa0 	ldr	x0, [x29, #24]
  400a2c:	f100001f 	cmp	x0, #0x0
  400a30:	540000e1 	b.ne	400a4c <delete_bst+0xc4>  // b.any
  400a34:	90000000 	adrp	x0, 400000 <_init-0x570>
  400a38:	913b6000 	add	x0, x0, #0xed8
  400a3c:	b94017a1 	ldr	w1, [x29, #20]
  400a40:	97fffef4 	bl	400610 <printf@plt>
  400a44:	d503201f 	nop
  400a48:	14000092 	b	400c90 <delete_bst+0x308>
  400a4c:	f9400fa0 	ldr	x0, [x29, #24]
  400a50:	f9400400 	ldr	x0, [x0, #8]
  400a54:	f100001f 	cmp	x0, #0x0
  400a58:	54000381 	b.ne	400ac8 <delete_bst+0x140>  // b.any
  400a5c:	f9400fa0 	ldr	x0, [x29, #24]
  400a60:	f9400800 	ldr	x0, [x0, #16]
  400a64:	f100001f 	cmp	x0, #0x0
  400a68:	54000301 	b.ne	400ac8 <delete_bst+0x140>  // b.any
  400a6c:	d0000080 	adrp	x0, 412000 <malloc@GLIBC_2.17>
  400a70:	91016000 	add	x0, x0, #0x58
  400a74:	f9400000 	ldr	x0, [x0]
  400a78:	f9400fa1 	ldr	x1, [x29, #24]
  400a7c:	eb00003f 	cmp	x1, x0
  400a80:	540000a1 	b.ne	400a94 <delete_bst+0x10c>  // b.any
  400a84:	d0000080 	adrp	x0, 412000 <malloc@GLIBC_2.17>
  400a88:	91016000 	add	x0, x0, #0x58
  400a8c:	f900001f 	str	xzr, [x0]
  400a90:	1400000b 	b	400abc <delete_bst+0x134>
  400a94:	f9401ba0 	ldr	x0, [x29, #48]
  400a98:	f9400400 	ldr	x0, [x0, #8]
  400a9c:	f9400fa1 	ldr	x1, [x29, #24]
  400aa0:	eb00003f 	cmp	x1, x0
  400aa4:	54000081 	b.ne	400ab4 <delete_bst+0x12c>  // b.any
  400aa8:	f9401ba0 	ldr	x0, [x29, #48]
  400aac:	f900041f 	str	xzr, [x0, #8]
  400ab0:	14000003 	b	400abc <delete_bst+0x134>
  400ab4:	f9401ba0 	ldr	x0, [x29, #48]
  400ab8:	f900081f 	str	xzr, [x0, #16]
  400abc:	f9400fa0 	ldr	x0, [x29, #24]
  400ac0:	97fffed0 	bl	400600 <free@plt>
  400ac4:	14000072 	b	400c8c <delete_bst+0x304>
  400ac8:	f9400fa0 	ldr	x0, [x29, #24]
  400acc:	f9400400 	ldr	x0, [x0, #8]
  400ad0:	f100001f 	cmp	x0, #0x0
  400ad4:	540000a0 	b.eq	400ae8 <delete_bst+0x160>  // b.none
  400ad8:	f9400fa0 	ldr	x0, [x29, #24]
  400adc:	f9400800 	ldr	x0, [x0, #16]
  400ae0:	f100001f 	cmp	x0, #0x0
  400ae4:	54000901 	b.ne	400c04 <delete_bst+0x27c>  // b.any
  400ae8:	d0000080 	adrp	x0, 412000 <malloc@GLIBC_2.17>
  400aec:	91016000 	add	x0, x0, #0x58
  400af0:	f9400000 	ldr	x0, [x0]
  400af4:	f9400fa1 	ldr	x1, [x29, #24]
  400af8:	eb00003f 	cmp	x1, x0
  400afc:	54000221 	b.ne	400b40 <delete_bst+0x1b8>  // b.any
  400b00:	f9400fa0 	ldr	x0, [x29, #24]
  400b04:	f9400400 	ldr	x0, [x0, #8]
  400b08:	f100001f 	cmp	x0, #0x0
  400b0c:	540000e1 	b.ne	400b28 <delete_bst+0x1a0>  // b.any
  400b10:	f9400fa0 	ldr	x0, [x29, #24]
  400b14:	f9400801 	ldr	x1, [x0, #16]
  400b18:	d0000080 	adrp	x0, 412000 <malloc@GLIBC_2.17>
  400b1c:	91016000 	add	x0, x0, #0x58
  400b20:	f9000001 	str	x1, [x0]
  400b24:	14000035 	b	400bf8 <delete_bst+0x270>
  400b28:	f9400fa0 	ldr	x0, [x29, #24]
  400b2c:	f9400401 	ldr	x1, [x0, #8]
  400b30:	d0000080 	adrp	x0, 412000 <malloc@GLIBC_2.17>
  400b34:	91016000 	add	x0, x0, #0x58
  400b38:	f9000001 	str	x1, [x0]
  400b3c:	1400002f 	b	400bf8 <delete_bst+0x270>
  400b40:	f9401ba0 	ldr	x0, [x29, #48]
  400b44:	f9400400 	ldr	x0, [x0, #8]
  400b48:	f9400fa1 	ldr	x1, [x29, #24]
  400b4c:	eb00003f 	cmp	x1, x0
  400b50:	54000141 	b.ne	400b78 <delete_bst+0x1f0>  // b.any
  400b54:	f9400fa0 	ldr	x0, [x29, #24]
  400b58:	f9400400 	ldr	x0, [x0, #8]
  400b5c:	f100001f 	cmp	x0, #0x0
  400b60:	540000c0 	b.eq	400b78 <delete_bst+0x1f0>  // b.none
  400b64:	f9400fa0 	ldr	x0, [x29, #24]
  400b68:	f9400401 	ldr	x1, [x0, #8]
  400b6c:	f9401ba0 	ldr	x0, [x29, #48]
  400b70:	f9000401 	str	x1, [x0, #8]
  400b74:	14000021 	b	400bf8 <delete_bst+0x270>
  400b78:	f9401ba0 	ldr	x0, [x29, #48]
  400b7c:	f9400400 	ldr	x0, [x0, #8]
  400b80:	f9400fa1 	ldr	x1, [x29, #24]
  400b84:	eb00003f 	cmp	x1, x0
  400b88:	54000141 	b.ne	400bb0 <delete_bst+0x228>  // b.any
  400b8c:	f9400fa0 	ldr	x0, [x29, #24]
  400b90:	f9400800 	ldr	x0, [x0, #16]
  400b94:	f100001f 	cmp	x0, #0x0
  400b98:	540000c0 	b.eq	400bb0 <delete_bst+0x228>  // b.none
  400b9c:	f9400fa0 	ldr	x0, [x29, #24]
  400ba0:	f9400801 	ldr	x1, [x0, #16]
  400ba4:	f9401ba0 	ldr	x0, [x29, #48]
  400ba8:	f9000401 	str	x1, [x0, #8]
  400bac:	14000013 	b	400bf8 <delete_bst+0x270>
  400bb0:	f9401ba0 	ldr	x0, [x29, #48]
  400bb4:	f9400800 	ldr	x0, [x0, #16]
  400bb8:	f9400fa1 	ldr	x1, [x29, #24]
  400bbc:	eb00003f 	cmp	x1, x0
  400bc0:	54000141 	b.ne	400be8 <delete_bst+0x260>  // b.any
  400bc4:	f9400fa0 	ldr	x0, [x29, #24]
  400bc8:	f9400400 	ldr	x0, [x0, #8]
  400bcc:	f100001f 	cmp	x0, #0x0
  400bd0:	540000c0 	b.eq	400be8 <delete_bst+0x260>  // b.none
  400bd4:	f9400fa0 	ldr	x0, [x29, #24]
  400bd8:	f9400401 	ldr	x1, [x0, #8]
  400bdc:	f9401ba0 	ldr	x0, [x29, #48]
  400be0:	f9000801 	str	x1, [x0, #16]
  400be4:	14000005 	b	400bf8 <delete_bst+0x270>
  400be8:	f9400fa0 	ldr	x0, [x29, #24]
  400bec:	f9400801 	ldr	x1, [x0, #16]
  400bf0:	f9401ba0 	ldr	x0, [x29, #48]
  400bf4:	f9000801 	str	x1, [x0, #16]
  400bf8:	f9400fa0 	ldr	x0, [x29, #24]
  400bfc:	97fffe81 	bl	400600 <free@plt>
  400c00:	14000023 	b	400c8c <delete_bst+0x304>
  400c04:	f9400fa0 	ldr	x0, [x29, #24]
  400c08:	f90013a0 	str	x0, [x29, #32]
  400c0c:	f9400fa0 	ldr	x0, [x29, #24]
  400c10:	f9400400 	ldr	x0, [x0, #8]
  400c14:	f90017a0 	str	x0, [x29, #40]
  400c18:	14000006 	b	400c30 <delete_bst+0x2a8>
  400c1c:	f94017a0 	ldr	x0, [x29, #40]
  400c20:	f90013a0 	str	x0, [x29, #32]
  400c24:	f94017a0 	ldr	x0, [x29, #40]
  400c28:	f9400800 	ldr	x0, [x0, #16]
  400c2c:	f90017a0 	str	x0, [x29, #40]
  400c30:	f94017a0 	ldr	x0, [x29, #40]
  400c34:	f9400800 	ldr	x0, [x0, #16]
  400c38:	f100001f 	cmp	x0, #0x0
  400c3c:	54ffff01 	b.ne	400c1c <delete_bst+0x294>  // b.any
  400c40:	f94017a0 	ldr	x0, [x29, #40]
  400c44:	b9400001 	ldr	w1, [x0]
  400c48:	f9400fa0 	ldr	x0, [x29, #24]
  400c4c:	b9000001 	str	w1, [x0]
  400c50:	f94013a1 	ldr	x1, [x29, #32]
  400c54:	f9400fa0 	ldr	x0, [x29, #24]
  400c58:	eb00003f 	cmp	x1, x0
  400c5c:	540000c1 	b.ne	400c74 <delete_bst+0x2ec>  // b.any
  400c60:	f94017a0 	ldr	x0, [x29, #40]
  400c64:	f9400401 	ldr	x1, [x0, #8]
  400c68:	f9400fa0 	ldr	x0, [x29, #24]
  400c6c:	f9000401 	str	x1, [x0, #8]
  400c70:	14000005 	b	400c84 <delete_bst+0x2fc>
  400c74:	f94017a0 	ldr	x0, [x29, #40]
  400c78:	f9400401 	ldr	x1, [x0, #8]
  400c7c:	f94013a0 	ldr	x0, [x29, #32]
  400c80:	f9000801 	str	x1, [x0, #16]
  400c84:	f94017a0 	ldr	x0, [x29, #40]
  400c88:	97fffe5e 	bl	400600 <free@plt>
  400c8c:	3940ffa0 	ldrb	w0, [x29, #63]
  400c90:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400c94:	d65f03c0 	ret

0000000000400c98 <display_tree>:
  400c98:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400c9c:	910003fd 	mov	x29, sp
  400ca0:	f9000fa0 	str	x0, [x29, #24]
  400ca4:	f9400fa0 	ldr	x0, [x29, #24]
  400ca8:	f100001f 	cmp	x0, #0x0
  400cac:	540002a0 	b.eq	400d00 <display_tree+0x68>  // b.none
  400cb0:	f9400fa0 	ldr	x0, [x29, #24]
  400cb4:	f9400400 	ldr	x0, [x0, #8]
  400cb8:	f100001f 	cmp	x0, #0x0
  400cbc:	54000080 	b.eq	400ccc <display_tree+0x34>  // b.none
  400cc0:	f9400fa0 	ldr	x0, [x29, #24]
  400cc4:	f9400400 	ldr	x0, [x0, #8]
  400cc8:	97fffff4 	bl	400c98 <display_tree>
  400ccc:	f9400fa0 	ldr	x0, [x29, #24]
  400cd0:	b9400001 	ldr	w1, [x0]
  400cd4:	90000000 	adrp	x0, 400000 <_init-0x570>
  400cd8:	913bc000 	add	x0, x0, #0xef0
  400cdc:	97fffe4d 	bl	400610 <printf@plt>
  400ce0:	f9400fa0 	ldr	x0, [x29, #24]
  400ce4:	f9400800 	ldr	x0, [x0, #16]
  400ce8:	f100001f 	cmp	x0, #0x0
  400cec:	540000c0 	b.eq	400d04 <display_tree+0x6c>  // b.none
  400cf0:	f9400fa0 	ldr	x0, [x29, #24]
  400cf4:	f9400800 	ldr	x0, [x0, #16]
  400cf8:	97ffffe8 	bl	400c98 <display_tree>
  400cfc:	14000002 	b	400d04 <display_tree+0x6c>
  400d00:	d503201f 	nop
  400d04:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400d08:	d65f03c0 	ret

0000000000400d0c <main>:
  400d0c:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400d10:	910003fd 	mov	x29, sp
  400d14:	90000000 	adrp	x0, 400000 <_init-0x570>
  400d18:	913be001 	add	x1, x0, #0xef8
  400d1c:	910043a0 	add	x0, x29, #0x10
  400d20:	a9400c22 	ldp	x2, x3, [x1]
  400d24:	a9000c02 	stp	x2, x3, [x0]
  400d28:	a9410c22 	ldp	x2, x3, [x1, #16]
  400d2c:	a9010c02 	stp	x2, x3, [x0, #16]
  400d30:	f9401021 	ldr	x1, [x1, #32]
  400d34:	f9001001 	str	x1, [x0, #32]
  400d38:	b9003fbf 	str	wzr, [x29, #60]
  400d3c:	1400000e 	b	400d74 <main+0x68>
  400d40:	d0000080 	adrp	x0, 412000 <malloc@GLIBC_2.17>
  400d44:	91016000 	add	x0, x0, #0x58
  400d48:	f9400002 	ldr	x2, [x0]
  400d4c:	b9803fa0 	ldrsw	x0, [x29, #60]
  400d50:	d37ef400 	lsl	x0, x0, #2
  400d54:	910043a1 	add	x1, x29, #0x10
  400d58:	b8606820 	ldr	w0, [x1, x0]
  400d5c:	2a0003e1 	mov	w1, w0
  400d60:	aa0203e0 	mov	x0, x2
  400d64:	97fffe9d 	bl	4007d8 <insert_bst>
  400d68:	b9403fa0 	ldr	w0, [x29, #60]
  400d6c:	11000400 	add	w0, w0, #0x1
  400d70:	b9003fa0 	str	w0, [x29, #60]
  400d74:	b9403fa0 	ldr	w0, [x29, #60]
  400d78:	7100241f 	cmp	w0, #0x9
  400d7c:	54fffe2d 	b.le	400d40 <main+0x34>
  400d80:	d0000080 	adrp	x0, 412000 <malloc@GLIBC_2.17>
  400d84:	91016000 	add	x0, x0, #0x58
  400d88:	f9400000 	ldr	x0, [x0]
  400d8c:	97ffffc3 	bl	400c98 <display_tree>
  400d90:	52800140 	mov	w0, #0xa                   	// #10
  400d94:	97fffe23 	bl	400620 <putchar@plt>
  400d98:	d0000080 	adrp	x0, 412000 <malloc@GLIBC_2.17>
  400d9c:	91016000 	add	x0, x0, #0x58
  400da0:	f9400000 	ldr	x0, [x0]
  400da4:	52800b01 	mov	w1, #0x58                  	// #88
  400da8:	97fffe8c 	bl	4007d8 <insert_bst>
  400dac:	d0000080 	adrp	x0, 412000 <malloc@GLIBC_2.17>
  400db0:	91016000 	add	x0, x0, #0x58
  400db4:	f9400000 	ldr	x0, [x0]
  400db8:	528004c1 	mov	w1, #0x26                  	// #38
  400dbc:	97fffe87 	bl	4007d8 <insert_bst>
  400dc0:	d0000080 	adrp	x0, 412000 <malloc@GLIBC_2.17>
  400dc4:	91016000 	add	x0, x0, #0x58
  400dc8:	f9400000 	ldr	x0, [x0]
  400dcc:	97ffffb3 	bl	400c98 <display_tree>
  400dd0:	52800140 	mov	w0, #0xa                   	// #10
  400dd4:	97fffe13 	bl	400620 <putchar@plt>
  400dd8:	d0000080 	adrp	x0, 412000 <malloc@GLIBC_2.17>
  400ddc:	91016000 	add	x0, x0, #0x58
  400de0:	f9400000 	ldr	x0, [x0]
  400de4:	52800b01 	mov	w1, #0x58                  	// #88
  400de8:	97fffeba 	bl	4008d0 <search_bst>
  400dec:	d0000080 	adrp	x0, 412000 <malloc@GLIBC_2.17>
  400df0:	91016000 	add	x0, x0, #0x58
  400df4:	f9400000 	ldr	x0, [x0]
  400df8:	52800b01 	mov	w1, #0x58                  	// #88
  400dfc:	97fffee3 	bl	400988 <delete_bst>
  400e00:	d0000080 	adrp	x0, 412000 <malloc@GLIBC_2.17>
  400e04:	91016000 	add	x0, x0, #0x58
  400e08:	f9400000 	ldr	x0, [x0]
  400e0c:	97ffffa3 	bl	400c98 <display_tree>
  400e10:	52800140 	mov	w0, #0xa                   	// #10
  400e14:	97fffe03 	bl	400620 <putchar@plt>
  400e18:	d503201f 	nop
  400e1c:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400e20:	d65f03c0 	ret
  400e24:	00000000 	.inst	0x00000000 ; undefined

0000000000400e28 <__libc_csu_init>:
  400e28:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400e2c:	910003fd 	mov	x29, sp
  400e30:	a901d7f4 	stp	x20, x21, [sp, #24]
  400e34:	b0000094 	adrp	x20, 411000 <__FRAME_END__+0x100e0>
  400e38:	b0000095 	adrp	x21, 411000 <__FRAME_END__+0x100e0>
  400e3c:	91374294 	add	x20, x20, #0xdd0
  400e40:	913722b5 	add	x21, x21, #0xdc8
  400e44:	a902dff6 	stp	x22, x23, [sp, #40]
  400e48:	cb150294 	sub	x20, x20, x21
  400e4c:	f9001ff8 	str	x24, [sp, #56]
  400e50:	2a0003f6 	mov	w22, w0
  400e54:	aa0103f7 	mov	x23, x1
  400e58:	9343fe94 	asr	x20, x20, #3
  400e5c:	aa0203f8 	mov	x24, x2
  400e60:	97fffdc4 	bl	400570 <_init>
  400e64:	b4000194 	cbz	x20, 400e94 <__libc_csu_init+0x6c>
  400e68:	f9000bb3 	str	x19, [x29, #16]
  400e6c:	d2800013 	mov	x19, #0x0                   	// #0
  400e70:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400e74:	aa1803e2 	mov	x2, x24
  400e78:	aa1703e1 	mov	x1, x23
  400e7c:	2a1603e0 	mov	w0, w22
  400e80:	91000673 	add	x19, x19, #0x1
  400e84:	d63f0060 	blr	x3
  400e88:	eb13029f 	cmp	x20, x19
  400e8c:	54ffff21 	b.ne	400e70 <__libc_csu_init+0x48>  // b.any
  400e90:	f9400bb3 	ldr	x19, [x29, #16]
  400e94:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400e98:	a942dff6 	ldp	x22, x23, [sp, #40]
  400e9c:	f9401ff8 	ldr	x24, [sp, #56]
  400ea0:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400ea4:	d65f03c0 	ret

0000000000400ea8 <__libc_csu_fini>:
  400ea8:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400eac <_fini>:
  400eac:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400eb0:	910003fd 	mov	x29, sp
  400eb4:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400eb8:	d65f03c0 	ret
